Bioelectronics
Department of Microelectronics

Reza Lotfi

Publications

  1. Speed-Power Improvement in High-Voltage Switches Employed in Multi-Electrode Arrays
    A. Safarpour; F. Dehnavi; M. Saberi; R. Lotfi; W.A. Serdijn;
    IEEE Transactions on Circuits and Systems II: Express Briefs,
    Volume 69, Issue 7, pp. 3139-3143, July 2022. DOI: 10.1109/TCSII.2022.3161202
    document

  2. A Charge-Redistribution Phase-Domain ADC Using an IQ-Assisted Binary-Search Algorithm
    Leila Rajabi; Mehdi Saberi; Yao Liu; Reza Lotfi; Wouter A. Serdijn;
    IEEE Transactions on Circuits and Systems I: Regular Papers,
    28 March 2017. DOI: 10.1109/TCSI.2017.2681461.
    document

  3. A Power-Efficient Signal-Specific ADC for Sensor-Interface Applications
    Rahiminejad, E.; Saberi, M.; Lotfi, R.;
    IEEE Transactions on Circuits and Systems II: Express Briefs,
    Volume 64, Issue 9, pp. 1032-1036, 2017. DOI: 10.1109/TCSII.2016.2622161

  4. A low-power capacitor switching scheme with low common-mode voltage variation for successive approximation ADC
    Rasool Ghasemi, A.; Saberi, M.; Lotfi, R.;
    Microelectronics Journal,
    Volume 61, pp. 15-20, 2017. DOI: 10.1016/j.mejo.2016.12.009

  5. Structured Electronic Design of High-Pass Sigma-Delta Converters and their Application to Cardiac Signal Acquisition
    Samprajani Rout; Wouter Serdijn; Reza Lotfi;
    In Book of Abstracts, 6th Dutch Bio-Medical Engineering Conference, 26 and 27 January 2017, Egmond aan Zee, The Netherlands,
    2017.
    document

  6. A highly-linear transconductor for G<inf>m</inf>-C tracking filters employed in digital TV tuners
    Hosnan, M.; Sobhanifar, H.; Lotfi, R.; Saberi, M.;
    In 2017 25th Iranian Conference on Electrical Engineering, ICEE 2017,
    pp. 502-505, 2017. DOI: 10.1109/IranianCEE.2017.7985089

  7. A fully-synchronous offset-insensitive level-crossing analog-To-digital converter
    Ravanshad, N.; Rezaee-Dehsorkh, H.; Lotfi, R.;
    In Midwest Symposium on Circuits and Systems,
    2017. DOI: 10.1109/MWSCAS.2016.7870108

  8. Ultra-Low-Noise Signal-Recording Amplifier/MUX ASIC
    A. Safarpour; R. Lotfi; W. A. Serdijn;
    In Proc. Design of Medical Devices Conf. (DMD) 2017 Microfabrication for Medical Devices,
    Eindhoven, the Netherlands, 14 – 15 Nov. 2017.
    document

  9. A High-Speed and Power-Efficient Voltage Level Shifter for Dual-Supply Applications
    Hosseini, S.R.; Saberi, M.; Lotfi, R.;
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
    2016.
    document

  10. An Improved-Accuracy Approach for Readout of Large-Array Resistive Sensors
    Yarahmadi, R.; Safarpour, A.; Lotfi, R.;
    IEEE Sensors Journal,
    Volume 16, Issue 1, pp. 210-215, 2016.
    document

  11. A 0.7-V 400-uW 16-bit audio sigma-delta modulator with a modified tracking quantizer
    Yaghoubi, M.; Saberi, M.; Lotfi, R.;
    In proc. 2016 24th Iranian Conference on Electrical Engineering, ICEE 2016,
    pp. 1336-1341, 2016.
    document

  12. A 21-bit Companding Two-Step Analog-to-Digital Converter using a Minimum Amount of High Voltage Devices for Recording Neural Responses in Cochlear Implants
    Cees-Jeroen Bes; Reza Lotfi; Wouter Serdijn; Jeroen Briaire; Johan Frijns;
    In Book of Abstracts, 5th Dutch Bio-Medical Engineering Conference,
    Egmond aan Zee, the Netherlands, January 22-23 2015.
    document

  13. A level-crossing based QRS-detection algorithm for wearable ECG sensors
    Ravanshad, N., Rezaee-Dehsorkh, H.; R. Lotfi; Lian, Y.;
    IEEE Journal of Biomedical and Health Informatics,
    Volume 18, Issue 1, pp. 183-192, 2014.

  14. Nonlinear signal-specific ADC for efficient neural recording in brain-machine interfaces
    Judy, M., Sodagar, A.M.; R. Lotfi; Sawan, M.;
    IEEE Transactions on Biomedical Circuits and Systems,
    Volume 8, Issue 3, pp. 371-381, 2014.

  15. A low-power subthreshold to above-threshold voltage level shifter
    Hosseini, S.R., Saberi, M.; R. Lotfi;
    IEEE Transactions on Circuits and Systems II: Express Briefs,
    Volume 61, Issue 10, pp. 753-757, 2014.

  16. Analysis and design of a low-voltage low-power double-tail comparator
    Babayan-Mashhadi, S.; R. Lotfi;
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
    Volume 22, Issue 2, pp. 343-352, 2014.

  17. A new approach to design safe and reliable electrical stimulator
    Moradi, S., Maghsoudloo, E.; R. Lotfi;
    International Journal of Biomedical Engineering and Technology,
    Volume 15, Issue 4, pp. 305-316, 2014.

  18. Segmented architecture for successive approximation analog-to-digital converters
    Saberi, M.; R. Lotfi;
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
    Volume 22, Issue 3, pp. 593-606, 2014.

  19. A Comparative Analysis of Phase-Domain ADC and Amplitude-Domain IQ ADC
    Yao Liu; Reza Lotfi; Yongchang Hu; Wouter A. Serdijn;
    IEEE Transactions on Circuits and Systems-I: Regular Papers,
    2014. Digital Object Identifier: 10.1109/TCSI.2014.2374852.
    document

  20. Low-voltage low-power Gm-C filters: A modified configuration for improving performance
    Fahmideh Akbarian, S.M.; R. Lotfi; Maymandi-Nejad, M.;
    Analog Integrated Circuits and Signal Processing,
    Volume 74, Issue 1, pp. 297-302, 2013.

  21. Pressure ulcer risk assessment by monitoring interface pressure and temperature
    Fard, F.D., Moghimi, S.; R. Lotfi;
    In 2013 21st Iranian Conference on Electrical Engineering, ICEE 2013,
    2013.

  22. Analysis of power in dynamic comparators
    Babayan-Mashhadi, S., Daliri, M.; R. Lotfi;
    In 2013 21st Iranian Conference on Electrical Engineering, ICEE 2013,
    2013.

  23. Detailed study of the time estimation in level-crossing analog-to-digital converters
    Ravanshad, N., Rezaee-Dehsorkh, H.; R. Lotfi;
    In 2013 21st Iranian Conference on Electrical Engineering, ICEE 2013,
    2013.

  24. Modified structures for power-efficient level translators
    Hosseini, S.R., Rahiminejad, E.; R. Lotfi;
    In 2013 21st Iranian Conference on Electrical Engineering, ICEE 2013,
    2013.

  25. A 10-bit 50-MS/s redundant SAR ADC with split capacitive-array DAC
    Arian, A., Saberi, M., Hosseini-Khayat, S.; R. Lotfi; Leblebici, Y.;
    Analog Integrated Circuits and Signal Processing,
    Volume 71, Issue 3, pp. 583-589, 2012.

  26. Impacts of NBTI/PBTI on performance of domino logic circuits with high-k metal-gate devices in nanoscale CMOS
    Houshmand Kaffashian, M.; R. Lotfi; Mafinezhad, K., Mahmoodi, H.;
    Microelectronics Reliability,
    Volume 52, Issue 8, pp. 1655-1659, 2012.

  27. An offset cancellation technique for comparators using body-voltage trimming
    Babayan-Mashhadi, S.; R. Lotfi;
    Analog Integrated Circuits and Signal Processing,
    pp. 1-10, 2012.

  28. Power reduction techniques in a 6 bit 1 GSPS flash ADC
    Nasrollaholhosseini, S.H., Babayan Mashhadi, S.; R. Lotfi;
    In ICEE 2012 - 20th Iranian Conference on Electrical Engineering,
    pp. 228-231, 2012.

  29. New charge balancing method based on imbalanced biphasic current pulses for functional electrical stimulation
    Moradi, S., Maghsoudloo, E.; R. Lotfi;
    In ICEE 2012 - 20th Iranian Conference on Electrical Engineering,
    pp. 270-274, 2012.

  30. A power-efficient CMOS active pixel sensor imager with column-level difference ADC in 0.18-μm
    Masoodian, S.; R. Lotfi;
    In ICEE 2012 - 20th Iranian Conference on Electrical Engineering,
    pp. 97-100, 2012.

  31. A low-power Successive Approximation ADC for biomedical applications
    Saberi, M., Sepehrian, H.; R. Lotfi; Mafinezhad, K.;
    IEICE Electronics Express,
    Volume 8, Issue 4, pp. 195-201, 2011.

  32. An optimization method for NBTI-aware design of domino logic circuits in nano-scale CMOS
    Kaffashian, M.H.; R. Lotfi; Mafinezhadand, K., Mahmoodi, H.;
    IEICE Electronics Express,
    Volume 8, Issue 17, pp. 1406-1411, 2011.

  33. Analysis and design of tunable amplifiers for implantable neural recording applications
    Rezaee-Dehsorkh, H., Ravanshad, N.; R. Lotfi; Mafinezhad, K., Sodagar, A.M.;
    IEEE Journal on Emerging and Selected Topics in Circuits and Systems,
    Volume 1, Issue 4, pp. 546-556, 2011.

  34. Impact of NBTI on performance of domino logic circuits in nano-scale CMOS
    Houshmand Kaffashian, M.; R. Lotfi; Mafinezhad, K., Mahmoodi, H.;
    Microelectronics Journal,
    Volume 42, Issue 12, pp. 1327-1334, 2011.

  35. Analysis of Power Consumption and Linearity in Capacitive Digital-to-Analog Converters Used in Successive Approximation ADCs
    Mehdi Saberi; Reza Lotfi; Khalil Mafinezhad; Wouter A. Serdijn;
    IEEE Transactions on Circuits and Systems-I: Regular Papers,
    Volume 58, Issue 8, pp. 1736-1748, Aug. 2011. Digital Object Identifier: 10.1109/TCSI.2011.2107214.
    document

  36. A signal-specific successive-approximation analog-to-digital converter
    Sepehrian, H., Saberi, M.; R. Lotfi;
    In Proceedings - IEEE International Symposium on Circuits and Systems,
    pp. 1624-1627, 2011.

  37. An offset cancellation technique for comparators using body-voltage trimming
    Mashhadi, S.B., Nasrollaholosseini, S.H., Sepehrian, H.; R. Lotfi;
    In 2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011,
    pp. 273-276, 2011.

  38. A linear tunable amplifier for implantable neural recording applications
    Rezaee-Dehsorkh, H., Ravanshad, N.; R. Lotfi; Mafinezhad, K.;
    In Midwest Symposium on Circuits and Systems,
    2011.

  39. A 1-V 416-nW fully integrated sensor interface IC for pacemakers
    Alahdab, S.; R. Lotfi; W.A. Serdijn;
    In IMEKO TC4 International Workshop on ADC Modelling, Testing and Data Converter Analysis and Design 2011, IWADC 2011 and IEEE 2011 ADC Forum,
    pp. 161-166, 2011.

  40. Linearity enhancement in digital-to-analog converters using a modified decoding architecture
    Hokmabadi, S.M.; R. Lotfi;
    In ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems,
    pp. 3361-3364, 2010.

  41. Capacitor scaling for low-power design of cyclic analog-to-digital converters
    Zaare', M.; R. Lotfi; Maymandi-nejad, M.;
    In ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems,
    pp. 1456-1459, 2010.

  42. Low-dropout voltage reference: An approach to buffered architectures with low sensitivity
    Aminzadeh, H.; R. Lotfi; Mafinezhad, K.;
    In ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems,
    pp. 849-852, 2010.

  43. Domino ADC: A novel analog-to-digital converter architecture
    Takhti, M., Sodagar, A.M.; R. Lotfi;
    In ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems,
    pp. 4057-4060, 2010.

  44. A digital background correction technique combined with DWA for DAC mismatch errors in multibit ΣΔ ADCs
    Pakniat, H., Yavari, M.; R. Lotfi;
    In ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems,
    pp. 293-296, 2010.

  45. A nonlinear signal-specific ADC for efficient neural recording
    Judy, M., Sodagar, A.M.; R. Lotfi;
    In 2010 IEEE Biomedical Circuits and Systems Conference, BioCAS 2010,
    pp. 17-20, 2010.

  46. Design of low-power single-stage operational amplifiers based on an optimized settling model
    Aminzadeh, H.; R. Lotfi; Mafinezhad, K.;
    Analog Integrated Circuits and Signal Processing,
    Volume 58, Issue 2, pp. 153-160, 2009.

  47. Modified model for settling behavior of operational amplifiers in nanoscale CMOS
    Rezaee-Dehsorkh, H., Ravanshad, N.; R. Lotfi; Mafinezhad, K.;
    IEEE Transactions on Circuits and Systems II: Express Briefs,
    Volume 56, Issue 5, pp. 384-388, 2009.

  48. Low-dropout voltage reference: An approach to low-temperature-sensitivity architectures with high drive capability
    Aminzadeh, H.; R. Lotfi; Mafinezhad, K.;
    Electronics Letters,
    Volume 45, Issue 24, pp. 1200-1201, 2009.

  49. A low-power architecture for integrating analog-to-digital converters
    Rahiminejad, E.; R. Lotfi;
    In 2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009,
    pp. 411-414, 2009.

  50. Analysis oy the linearity of pipelined ADC due to capacitor non-linearity
    Saberi, M.; R. Lotfi;
    In 2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009,
    pp. 403-406, 2009.

  51. Ultra-low-power design of analog-to-digital converters for wearable and implantable medical devices
    Reza Lotfi; Wouter A. Serdijn;
    In Book of Abstracts, Dutch Conference on Biomedical Engineering (BME),
    Egmond aan Zee, the Netherlands, Jan. 22-23 2009.

  52. An Ultra-Low-Power 10-Bit 100-kS/s Successive-Approximation Analog-to-Digital Converter
    Reza Lotfi; Rabe?eh Majidi; Mohammad Maymandi-Nejad; Wouter A. Serdijn;
    In Proc. International Symposium on Circuits and Systems (ISCAS),
    Taipei, Taiwan, IEEE, May 24-27 2009.
    document

  53. Design of high-speed two-stage cascode-compensated operational amplifiers based on settling time and open-loop parameters
    Aminzadeh, H., Danaie, M.; R. Lotfi;
    Integration, the VLSI Journal,
    Volume 41, Issue 2, pp. 183-192, 2008.

  54. On the power efficiency of cascode compensation over miller compensation in two-stage operational amplifiers
    Aminzadeh, H.; R. Lotfi;
    Journal of Circuits, Systems and Computers,
    Volume 17, Issue 1, pp. 1-13, 2008.

  55. A sub-1-V high-gain single-stage operational amplifier
    Alireza Zabihian, S.; R. Lotfi;
    IEICE Electronics Express,
    Volume 5, Issue 7, pp. 211-216, 2008.

  56. Low-cost area-efficient low-dropout regulators using MOSFET capacitors
    Aminzadeh, H.; R. Lotfi; Mafinezhad, K.;
    IEICE Electronics Express,
    Volume 5, Issue 16, pp. 610-616, 2008.

  57. Area-efficient low-cost low-dropout regulators using MOS capacitors
    Aminzadeh, H.; R. Lotfi; Mafinezhad, K.;
    In 2008 International Symposium on System-on-Chip Proceedings, SOC 2008,
    2008.

  58. Simulation-equation-based methodology for design of CMOS amplifiers using geometric programming
    Maghami, M.H., Inanlou, F.; R. Lotfi;
    In Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008,
    pp. 360-363, 2008.

  59. Design guidelines for high-speed two-stage CMOS operational amplifiers
    Aminzadeh, H.; R. Lotfi;
    Arabian Journal for Science and Engineering,
    Volume 32, Issue 2 C, pp. 75-87, 2007.

  60. Design of cascode-compensated opamps based on settling time and open-loop parameters
    Aminzadeh, H., Danaie, M.; R. Lotfi;
    In 24th Norchip Conference, 2006,
    pp. 111-116, 2007.

  61. Design of high-resolution MOSFET-only pipelined ADCs with digital calibration
    Aminzadeh, H., Danaie, M.; R. Lotfi;
    In Proceedings -Design, Automation and Test in Europe, DATE,
    pp. 427-432, 2007.

  62. Ultra-low-voltage, low-power, high-speed operational amplifiers using body-driven gain-boosting technique
    Zabihian, S.A.; R. Lotfi;
    In Proceedings - IEEE International Symposium on Circuits and Systems,
    pp. 705-708, 2007.

  63. Body-driven enhanced-impedance current source: An approach to the implementation of low-voltage Current-Steering D/A Converters
    Hokmabadi, S.M., Zabihian, S.A.; R. Lotfi;
    In Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems,
    pp. 1147-1150, 2007.

  64. Minimizing power in very-low-voltage switched-opamp pipelined ADCs
    Nabavi, M.R.; R. Lotfi;
    In ICSPC 2007 Proceedings - 2007 IEEE International Conference on Signal Processing and Communications,
    pp. 289-292, 2007.

  65. Design of two-stage miller-compensated amplifiers based on an optimized settling model
    Aminzadeh, H., Danaie, M.; R. Lotfi;
    In Proceedings of the IEEE International Conference on VLSI Design,
    pp. 171-176, 2007.

  66. A capacitor mismatch- and nonlinearity-insensitive 1.5-bit residue stage for pipelined ADCs
    Saberi, M.; R. Lotfi;
    In Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems,
    pp. 677-680, 2007.

  67. A low-power CMOS Gm-C filter for wireless receiver applications with on-chip automatic tuning system
    Adrang, H.; R. Lotfi; Mafinejhad, K., Tajalli, A., Mehrmanesh, S.;
    In Proceedings - IEEE International Symposium on Circuits and Systems,
    pp. 3810-3813, 2006.

  68. A 1-V 12-bit switched-opamp pipelined ADC with power optimization
    Nabavi, M.R.; R. Lotfi;
    In Proceedings - IEEE International Symposium on Circuits and Systems,
    pp. 5359-5362, 2006.

  69. A 1.8V, 10-bit, 40MS/S MOSFET-only pipeline analog-to-digital converter
    Charkhkar, H., Asadi, A.; R. Lotfi;
    In Proceedings - IEEE International Symposium on Circuits and Systems,
    pp. 5363-5366, 2006.

  70. ISECAD: An iterative simulation-equation-based opamp-design CAD tool
    Toosi, T.K., Tabasy, E.Z., Sarbishaei, H.; R. Lotfi;
    In Proceedings - IEEE International Symposium on Circuits and Systems,
    pp. 5243-5246, 2006.

  71. Design guidelines for two-stage cascode-compensated operational amplifiers
    Aminzadeh, H.; R. Lotfi; Rahimian, S.;
    In Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems,
    pp. 264-267, 2006.

  72. A low-power design methodology for single-stage operational amplifiers
    Aminzadeh, H., Danaie, M.; R. Lotfi;
    In Proceedings - 2006 International Conference on Design and Test of Integrated Systems in Nanoscale Technology, IEEE DTIS 2006,
    pp. 62-67, 2006.

  73. A straightforward design methodology for multi-bit continuous time delta sigma modulators
    Shamsi, H., Radiom, S., Shoaei, O.; R. Lotfi;
    In Midwest Symposium on Circuits and Systems,
    pp. 409-413, 2006.

  74. Power optimization in low-voltage high-speed high-resolution pipelined ADCs
    Sarbishaei, H., Tabasy, E.Z., Toosi, T.K.; R. Lotfi;
    In Midwest Symposium on Circuits and Systems,
    pp. 153-157, 2006.

  75. Folded-current-steering DAC: An approach to low-voltage high-speed high-resolution D/A converters
    Radiom, S., Sheikholeslami, B., Aminzadeh, H.; R. Lotfi;
    In Proceedings - IEEE International Symposium on Circuits and Systems,
    pp. 4783-4786, 2006.

  76. Open-loop analysis of cascode compensation
    Aminzadeh, H.; R. Lotfi;
    In 4th International IEEE North-East Workshop on Circuits and Systems, NEWCAS 2006 - Conference Proceedings,
    pp. 81-84, 2006.

  77. Design of low-voltage MOSFET-only switched-capacitor filters
    Ghasemi, R., Charkhkar, H., As-Adi, A.; R. Lotfi; Mafinejad, K.;
    In Proceedings of the International Conference on Microelectronics, ICM,
    pp. 24-29, 2005.

  78. Power consumption issues in high-speed high- resolution pipelined A/D converters
    R. Lotfi; Taherzadeh-Sani, M., Shoaei, O.;
    In Proceedings - IEEE International Symposium on Circuits and Systems,
    pp. 4618-4621, 2005.

  79. Switched-opamp technique for 1-V 12-bit pipelined ADC
    Nabavi, M.R.; R. Lotfi;
    In Midwest Symposium on Circuits and Systems,
    pp. 851-854, 2005.

  80. A low-voltage high-PSRR CMOS PTAT & constant-gm reference circuit
    Danaie, M.; R. Lotfi;
    In Midwest Symposium on Circuits and Systems,
    pp. 1807-1810, 2005.

  81. A high-gain high-speed low-power class-AB operational amplifier
    Sarbishaei, H., Kahookar, T., Tabasy, E.Z.; R. Lotfi;
    In Midwest Symposium on Circuits and Systems,
    pp. 271-274, 2005.

  82. Analysis of dynamic non-linearities in pipeline ADCs
    Taherzadeh-Sani, M.; R. Lotfi; Shoaei, O.;
    IEICE Transactions on Electronics,
    Volume E87-C, Issue 6, pp. 976-984, 2004.

  83. Pseudo-class-AB telescopic-cascode operational amplifier
    Taherzadeh-Sani, M.; R. Lotfi; Shoaei, O.;
    Electronics Letters,
    Volume 40, Issue 4, pp. 219-221, 2004.

  84. Systematic design for optimization of high-resolution pipelined ADCs
    Taherzadeh-Sani, M.; R. Lotfi; Shoaei, O.;
    In Proceedings - Design, Automation and Test in Europe Conference and Exhibition,
    pp. 678-679, 2004.

  85. A pseudo-class-AB telescopic-cascode operational amplifier
    Taherzadeh-Sani, M.; R. Lotfi; Shoaei, O.;
    In Proceedings - IEEE International Symposium on Circuits and Systems,
    pp. I737-I740, 2004.

  86. A 12-bit 40MSPS 3.3-V 56-mW pipelined A/D converter in 0.25-um CMOS
    R. Lotfi; Taherzadeh-Sani, M., Shoaei, O.;
    In Proceedings - IEEE International Symposium on Circuits and Systems,
    pp. I69-I72, 2004.

  87. Low-power design techniques for low-voltage fast-settling operational amplifiers in switched-capacitor applications
    R. Lotfi; Taherzadeh-Sani, M., Yaser Azizi, M., Shoaei, O.;
    Integration, the VLSI Journal,
    Volume 36, Issue 4, pp. 175-189, 2003.

  88. A Low-Power Design Methodology for High-Resolution Pipelined Analog-to-Digital Converters
    R. Lotfi; Taherzadeh-Sani, M., Yaser Azizi, M., Shoaei, O.;
    In Proceedings of the International Symposium on Low Power Electronics and Design,
    pp. 334-339, 2003.

  89. An analytical approach to the estimation of dynamic non-linearity parameters in pipeline A/D converters
    Taherzadeh-Sani, M.; R. Lotfi; Shoaei, O.;
    In European Solid-State Circuits Conference,
    pp. 715-718, 2003.

  90. A 1-V 1-mW High-Speed Class AB Operational Amplifier for High-Speed Low Power Pipelined A/D Converters using "Slew Boost" Technique
    Aslanzadeh, H.A., Mehrmanesh, S., Vahidfar, M.B., Safarian, A.Q.; R. Lotfi;
    In Proceedings of the International Symposium on Low Power Electronics and Design,
    pp. 340-344, 2003.

  91. An analytical approach to the estimation of the spurious-free dynamic range in pipeline A/D converters
    Taherzadeh-Sani, M.; R. Lotfi; Shoaei, O.;
    In Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems,
    pp. 946-949, 2003.

  92. A 1.5-V 12-BIT 75M-samples/s fully-differential low-power sample-and-hold amplifier in 0.25-μm CMOS
    R. Lotfi; Tahenadeh-Sani, M., Shoaei, O.;
    In Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems,
    pp. 814-817, 2003.

  93. A New Architecture for Rail-to-Rail Input Constant-gm CMOS Operational Transconductance Amplifiers
    M.M. Ahmadi; R. Lotfi; Sharif-Bakhtiar, M.;
    In Proceedings of the International Symposium on Low Power Electronics and Design,
    pp. 353-358, 2003.

  94. A novel frequency compensation technique for two-stage CMOS operational amplifiers
    Taherzadeh-Sani, M.; R. Lotfi; Shoaei, O.;
    In Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems,
    pp. 256-259, 2003.

  95. A Statistical Approach to Estimate the Dynamic Non-Linearity Parameters of Pipeline ADCs
    Taherzadeh-Sani, M.; R. Lotfi; Shoaei, O.;
    In IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers,
    pp. 367-370, 2003.

  96. Systematic Design for Power Minimization of Pipelined Analog-to-Digital Converters
    R. Lotfi; Taherzadeh-Sani, M., Yaser Azizi, M., Shoaei, O.;
    In IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers,
    pp. 371-374, 2003.

  97. A low-voltage low-power fast-settling operational amplifier for use in high-speed high-resolution pipelined A/D converters
    R. Lotfi; Shoaei, O.;
    In Proceedings - IEEE International Symposium on Circuits and Systems,
    pp. II/416-II/419, 2002.

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