A POWER_EFFICIENT MULTICHANNEL NEURAL STIMULATOR USING HIGH-FREQUENCY PULSED EXCITATION
Marijn van Dongen, Wouter Serdijn
Abstract: This work presents a neural stimulator system that employs a fundamentally different way of stimulating neural tissue as compared to classical constant current stimulation. A stimulation pulse is composed of a sequence of current pulses injected at a frequency of 1 MHz for which the duty cycle is used to control the stimulation intensity. The efficacy of this type of stimulation is first verified with simulations that use dynamic tissue and axonal models. Second, the models are verified using an in vitro measurement setup in which the response of Purkinje cells in the cerebellum of a mouse is measured as a function of a high-frequency stimulation signal using patch-clamp techniques [1]. The measurements confirm that high-frequency stimulation can recruit neurons in a similar way as classical constant current stimulation. Subsequently a prototype IC design is realized that implements a high-frequency stimulator system [2]. The system features 8 independent channels that connect to any of the 16 electrodes at the output. A sophisticated control system allows for individual control of each channel's stimulation and timing parameters. This flexibility makes the system suitable for complex electrode configurations and current steering applications. Simultaneous multichannel stimulation is implemented using a high frequency alternating technique, which reduces the amount of electrode switches by a factor 8. The system has the advantage of requiring a single inductor as its only external component. Furthermore it offers a high power efficiency, which is nearly independent on both the voltage over the load as well as on the number of simultaneously operated channels. Measurements confirm this: in multichannel mode the power efficiency can be increased for specific cases to 40% compared to 20% that is achieved by state-of-the-art classical constant current stimulators with adaptive power supply.

A 21-BIT COMPANDING TWO-STEP ANALOG-TO-DIGITAL CONVERTER USING A MINIMUM AMOUNT OF HIGH VOLTAGE DEVICES FOR RECORDING NEURAL RE-SPONSES IN COCHLEAR IMPLANTS
Cees-Jeroen Bes, Reza Lotfi, Wouter Serdijn, Jeroen Briaire, Johan Frijns
Abstract: Modern Cochlear implants (CIs) are equipped with a neural response recording system to record neural responses evoked by the stimulus applied to the auditory nerve by the implant. These recording systems are perfectly able to record neural responses once the stimulus and artifact (due to the residual charge at the electrode after stimulus) are over, but are not able to record during stimulus and artifact. This implies that the implant can neither check whether the stimulus is applied properly nor how the nerve fibers respond to the stimulus during stimulation and artifact. Moreover, medical scientists are not able to fine-tune the implant to the patient specific needs accurately. In the future, it is foreseen that CIs will be able to adjust their stimulation based on the neural response during and directly after stimulation [1]. The dynamic range of existing neural recording systems is thus limited and smaller than desired. As the stimulus can be as high as 20 Volt while neural responses can be as small as 10┬ÁV, a dynamic range of 126-dB is required. A solution to fulfill the dynamic range requirement can be found by using a 21-bit two-step Analog-to-Digital Converter (ADC) system based on a technique called Additive Instantaneous Companding [2]. The two-step ADC system consists of two stages; The first stage contains a 5-bit coarse ADC and DAC able to capture a high voltage input signal, compressing the signal to the low voltage domain and generating the 5 Most Significant Bits (MSBs) of the two-step ADC system. An Analog Charge Domain Offsetting System is proposed as implementation of the first stage. This system can be realized using switched capacitor (SC) circuits. As high voltage capacitors occupy a much larger physical area than their low voltage counterparts, by the use of only one high voltage capacitor, the circuit can be made very compact, i.e., with a small form factor, yet sufficiently low noise [3]. The second stage contains a 16-bit fine ADC for converting the remaining low voltage compressed signal to the digital domain and generating the 16 Least Significant Bits (LSBs) of the two-step ADC. The 16-bit ADC can be completely implemented in using low voltage components. The MSBs and LSBs will be digitally added in order to expand (reconstruct) the original signal in the digital domain.

AUTONOMOUS WIRELESS SENSOR FOR ECG MONITORING
Andre Luis Mansano, Yongjia Li, Wouter Serdijn
Abstract: Currently, the electronics market is hoping to see great technical developments on wirelessly connected sensors that can be used in many applications, in particular for biomedical signals monitoring that is foreseen to represent a large portion of this market in the near future. The role of researchers and industry is to fulfil the high expectation of the biomedical market by bringing new and smart solutions. Current solutions, such as the ones described in [1]-[4], implement promising wireless ExG monitoring systems using low power signal processing and low power synchronous data transmission. However, for such an application there is a need to reduce the power consumption even further while maintaining performance. In this work, an asynchronous way to monitor ECG signals is proposed to reduce the power consumption of the entire wireless sensor. The implementation consists of an asynchronous Analog to Digital Converter (ADC) combined with a Low Noise Amplifier (LNA) and a Programmable Voltage to Current Converter (PVCC) to process ECG signals. In addition, a Radio Frequency (RF) energy harvester is designed to supply the sensor from an RF supply at 13.56 MHz. The ECG signal processed and converted in the sensor is transmitted by means of a passive transmitter that makes use of the Medical Implant Communication Service (MICS) 402 MHz frequency band. The autonomous wireless sensor has been designed and tested to verify its functionality and performance. It offers an 8 bit signal conversion resolution, 90 kbps data rate, which represents 35% of data compression compared with [1] and [2], when powered by a -13 dBm RF signal at 13.56 MHz. An ECG signal of 8mVpp has been applied to the sensor input and the RF data transmitted through the MICS band has been reconstructed. As a final result, the power consumption of the proposed design is 40% lower than the state of the art.

RECTIFIER AUTOMATIC IMPEDANCE MATCHING FOR BIOMEDICAL IMPLANTS
Gustavo Martins, Wouter Serdijn
Abstract: Wireless power transfer or harvesting has enabled several applications, including RFID and low-power remote sensing [1-3]. It is also a suitable method for providing power to electronic devices implanted in the human body or attached to a patient's skin, as it prevents the need for uncomfortable cables or surgeries to replace batteries. Wireless power receivers are usually characterized by a high frequency input signal with low available power. In implanted devices, the antenna or coil alignment and its distance from the skin, as well as the composition of the tissue layers that separate it from the outside world, are hard to predict. All these factors influence the amount of power available to the implanted device., which takes the AC/DC power converting chain away from the optimum operating point for which it was designed. Basically, a change in available input power changes the optimum rectifier DC load and its input impedance. An adaptive power conversion chain can be designed to compensate those variations, thus increasing the system operating range and reliability. In the proposed approach, a DC-DC switched converter modulates the rectifier output load [4] while the input impedance matching circuit is simultaneously adapted in order to track the maximum power transfer point. This technique increases the input power range over which the rectifier converts with high efficiency. Simulation results shows that the rectifier can operate with power conversion efficiencies greater than 50% for an input power ranging from -22 dBm to +2 dBm.