MSc thesis project proposal

[2023] Low Power Analog Front-End Resilient to Large Stimulation Artifacts for Bidirectional Brain-Computer Interfaces

Bidirectional brain-computer interfaces (BCIs) have gained significant attention in recent years, as they allow for seamless communication between the brain and external devices to treat neurological disorders such as blindness, motor impairment, epilepsy, depression, etc. However, one of the major challenges in developing such interfaces is the presence of stimulation artifacts, which can significantly affect the quality of recorded neural signals during concurrent stimulation and recording operation. In this MSc thesis project, we propose the design of a low-power analog front-end that is resilient to large stimulation artifacts for bidirectional BCIs. The successful completion of this project will contribute towards the development of more robust bidirectional BCIs, which can be used for a wide range of applications in the fields of healthcare and neuroscience.

 

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Assignment

The main objective of this project is to design an analog front-end that can effectively filter out stimulation artifacts, while preserving the integrity of the neural signals. The project is embedded in on-going efforts in the group for predicting stimulation artifact behavior and optimization through stimulation waveform design. The project will involve the following specific objectives:

  • Reviewing the existing literature on analog front-ends for BCIs, and identifying the key challenges associated with large stimulation artifacts.
  • Designing a low-power analog front-end that is capable of filtering out stimulation artifacts, based on predictive algorithms developed in the group and using techniques such as adaptive filtering, notch filtering, front-end signal cancellation.
  • Evaluating the performance of the proposed analog front-end, by analyzing the quality of the recorded neural signals in the presence of large stimulation artifacts.

The proposed analog front-end will be designed in 40-nm CMOS technology using Cadence. The performance of the (manufactured*) analog front-end will be evaluated in-vitro, and will be compared against existing state-of-the-art solutions.

*tapeout of the design is encouraged and supported, but not mandatory.

 

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CatalanHmong DawRomanian

Chinese SimplifiedHungarianRussian

Chinese TraditionalIndonesianSlovak

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DutchKlingonSwedish

EnglishKoreanThai

EstonianLatvianTurkish

FinnishLithuanianUkrainian

FrenchMalayUrdu

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Requirements

MSc EE-ME student.

You should be comfortable with mixed-signal IC design and the Cadence analog environment. Curiosity, hard work, and creativity are always needed. If you are interested, contact Dr. Dante Muratore via email with a motivation letter and attached CV (with taken courses and grades).

Prerequisites: EE4520 Analog CMOS design I, ET4369 Nyquist-rate data converters.

Recommended: ET4252 Analog integrated circuit design, ET4278 Over-sampled data converters.

 

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English

ArabicHebrewPolish

BulgarianHindiPortuguese

CatalanHmong DawRomanian

Chinese SimplifiedHungarianRussian

Chinese TraditionalIndonesianSlovak

CzechItalianSlovenian

DanishJapaneseSpanish

DutchKlingonSwedish

EnglishKoreanThai

EstonianLatvianTurkish

FinnishLithuanianUkrainian

FrenchMalayUrdu

GermanMalteseVietnamese

GreekNorwegianWelsh

Haitian CreolePersian 

 

 

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Contact

dr. Dante Muratore

Bioelectronics Group

Department of Microelectronics

Last modified: 2023-05-28