[2023] Exploring the use of FPGAs & ASIPs in next-generation neural implants

Implantable Medical Devices (IMDs), such as pacemakers, cardioverter defibrillators, neurostimulators etc., belong to a class of highly life-critical, resource-constrained, deeply embedded systems out there. Commercial IMDs primarily use MCUs to execute critical tasks. However, these MCUs, which are based on CPUs, do not scale well for next-generation workloads. FPGAs, on the other hand, are more suitable due to their inherent parallelism and reconfigurability. However, FPGAs are generally considered unsuited for these resource-constrained devices, in terms of energy consumption. This is a general misconception that this thesis challenges.

Assignment

Bust the myth that reconfigurable logic is incompatible with IMDs in terms of energy, performance, reconfiguration penalties etc. While FPGAs are our main focus, ASIPs (Application-Specific Instruction-set Processors) – that is, processors with instruction sets and microarchitectures tuned for special purposes – may also be a viable option for next-generation IMDs.

Requirements

Two MSc students (FPGA design, ASIP design) in Computer Engineering, Embedded Systems or Biomedical Engineering with a profile in FPGA, computer architecture, compilers, hardware design, signal processing (basic), and optionally, Python, C programming

Contact

Last modified: 2022-10-04