MSc thesis project proposal

[2024] Dendritic circuits in neuromorphic hardware

Neuromorphic engineering aims at (i) replicating the key computational primitives of the brain in silicon, and (ii) exploiting them to demonstrate a competitive advantage over conventional machine learning approaches. To date, the neuromorphic engineering community mostly focused on the design neuron and synapse circuits and on their large-scale on-chip integration. However, it appears that the tree-structured input stages of neurons, known as dendrites, exhibit distinct computational properties. Indeed, recent studies highlight dendrites as a key computational primitive: they enable complex non-linear spatio-temporal processing in the brain [1], can multiplex information and help avoid catastrophic forgetting in neural networks [2], and may implement the key mechanisms that the brain uses for learning and plasticity in complex neural network structures [3].

In this MSc thesis project, we propose to survey the key dendritic functions and choose a subset of them for further analyses and implementation in custom neuromorphic hardware. Experiments can be carried out first with a flexible deep learning framework such as PyTorch [4]. Then, digital circuits for the chosen dendritic primitives will be designed and implemented in the ODIN spiking neural network (SNN) processor.

More about ODIN:

ODIN is an open-source digital SNN processor [5]. It is based on a single 256-neuron 64k-synapse crossbar neurosynaptic core with the following key features:
- synapses embed spike-dependent synaptic plasticity (SDSP)-based online learning on 3-bit weights,
- neurons can reproduce the 20 main spiking behaviors of biological cortical neurons.
ODIN is thus a versatile neuromorphic experimentation platform for learning in low-cost smart sensor nodes. At the time of publication, it demonstrated (i) record neuron and synapse densities and (ii) the lowest energy per synaptic operation.
Its full Verilog HDL code and documentation are publicly available at

[1] A. Payeur et al., "Classes of dendritic information processing," Current Opinion in Neurobiology, vol. 58, pp. 78-85, 2019.
[2] A. Iyer et al., "Avoiding catastrophe: active dendrites enable multi-task learning in dynamic environments," arXiv preprint arXiv:2201.00042, 2021.
[3] B. A. Richards and T. P. Lillicrap, "Dendritic solutions to the credit assignment problem," Current Opinion in Neurobiology, vol. 54, pp. 28-36, 2019
[5] C. Frenkel et al., "A 0.086-mm² 12.7-pJ/SOP 64k-synapse 256-neuron online-learning digital spiking neuromorphic processor in 28-nm CMOS," IEEE Transactions on Biomedical Circuits and Systems, vol. 13, no. 1, pp. 145-158, 2019.


1. Survey of the key dendritic functions (a starting list for papers will be provided) and selection of a subset for implementation depending on the student's interests and hardware implementation feasibility.
2. [Optional] PyTorch implementation of the chosen dendritic primitives, which will help iterate on the requirements for hardware implementation at the next step.
3. Hardware implementation in ODIN and RTL simulations demonstrating proper operation on a simple use case (e.g., low-dimensional dataset or proof-of-concept tasks such as temporal function fitting).


You should be familiar with digital hardware description languages such as VHDL or Verilog.
You should also have basic notions of neural network training (if not, you can go through this excellent series of 4 videos: Previous exposure to any deep learning framework (Keras, Tensorflow, PyTorch,...) is a plus.
Curiosity-driven and unconventional ideas are always welcome and can be integrated in the MSc thesis project. Interested students should send a motivation letter together with their CV (incl. course transcripts and grades) to Dr. Charlotte Frenkel at

More MSc proposals for Dr. Charlotte Frenkel will appear in the coming weeks, interested students are encouraged to reach out by e-mail to enquire about upcoming projects.


dr. Charlotte Frenkel

Electronic Instrumentation Group

Department of Microelectronics

Last modified: 2024-02-06