Dante Muratore

Publications

  1. A Power-Efficient Oscillatory Synchronization Feature Extractor for Closed-Loop Neuromodulation
    Yassin, Hoda; Akhoundi, Arash; Hasaneen, El-Sayed; Muratore, Dante G;
    IEEE Transactions on Circuits and Systems II - Express Briefs,
    January 2024. DOI: 10.1109/TCSII.2024.3353927

  2. Spike sorting in the presence of stimulation artifacts: a dynamical control systems approach
    Shokri, Mohammad; Gogliettino, Alex R; Hottowy, Pawel andSher, Alexander; Litke, Alan M; Chichilnisky, E J; Pequito, Sérgio; Muratore, Dante;
    Journal of Neural Engineering,
    January 2024. DOI: 10.1088/1741-2552/ad228f

  3. Data Compression Versus Signal Fidelity Tradeoff in Wired-OR Analog-to-Digital Compressive Arrays for Neural Recording
    Pumiao Yan; Arash Akhoundi; Nishal P Shah; Pulkit Tandon; Dante G Muratore; EJ Chichilnisky; Boris Murmann;
    IEEE transactions on biomedical circuits and systems,
    July 2023. DOI: 10.1109/TBCAS.2023.3292058

  4. A 1024-Channel 268-nW/Pixel 36×36μm2/Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain–Computer Interfaces
    Jang, Moonhyung; Hays, Maddy; Yu, Wei-Han; Lee, Changuk; Caragiulo, Pietro; Ramkaj, Athanasios T.; Wang, Pingyu; Phillips, A. J.; Vitale, Nicholas; Tandon, Pulkit; Yan, Pumiao; Mak, Pui-In; Chae, Youngcheol; Chichilnisky, E. J.; Murmann, Boris; Muratore, Dante G.;
    IEEE Journal of Solid-State Circuits,
    December 2023. DOI: 10.1109/JSSC.2023.3344798

  5. A 1024-Channel 268 nW/pixel 36x36 μm2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces
    MoonHyung Jang; Wei-Han Yu; Changuk Lee; Maddy Hays; Pingyu Wang; Nick Vitale; Pulkit Tandon; Pumiao Yan; Pui-In Mak; Youngcheol Chae; EJ Chichilnisky; Boris Murmann; Dante G Muratore;
    In IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),
    2023. DOI: 10.23919/VLSITechnologyandCir57934.2023.10185288

  6. A Low-Power Oscillatory Feature Extraction Unit for Implantable Neural Interfaces
    Hoda Yassin; Arash Akhoundi; El-Sayed Hasaneen; Dante G Muratore;
    In IEEE International Symposium on Circuits and Systems (ISCAS),
    2023. DOI: 10.1109/ISCAS46773.2023.10181914

  7. FARA: A Fast Artifact Recovery Algorithm with Optimum Stimulation Waveform for Single-Cell Resolution Massively Parallel Neural Interfaces
    Rohan Brash; Wouter Serdijn; Dante G. Muratore;
    In IEEE International Symposium on Circuits and Systems (ISCAS),
    May 2022. DOI: 10.1109/ISCAS48785.2022.9937814

  8. Data Compression versus Signal Fidelity Trade-off in Wired-OR ADC Arrays for Neural Recording
    Pumiao Yan; Nishal P. Shah; Dante G. Muratore; Pulkit Tandon; E. J. Chichilnisky; Boris Murmann;
    In IEEE Biomedical Circuits and Systems Conference (BioCAS),
    2022. DOI: 10.1109/BioCAS54905.2022.9948677

  9. An 800 nW Switched-Capacitor Feature Extraction Filterbank for Sound Classification
    D.A. Villamizar; D.G. Muratore; J.B. Wieser; B. Murmann;
    IEEE Transactions on Circuits and Systems I Regular Papers, pp. 1–11, 2021,
    Volume 68, pp. 578 - 1588, January 2021. DOI: 10.1109/TCSI.2020.3047035
    document

  10. DATA-COMPRESSIVE SENSOR ARRAY
    B. Murmann; D. G. Muratore; E. J. Chichilnisky; P. Tandon;
    Patent, US20210330449A1, 2021.

  11. Power-saving design opportunities for wireless intracortical brain-computer interfaces
    N. Even-Chen; D.G. Muratore; S.D. Stavisky; L.R. Hochberg; J.M. Henderson; B. Murmann; K.V. Shenoy;
    Nature biomedical engineering,
    Issue 4, pp. 984–996, Augustus 2020.
    document

  12. Artificial Retina: A Future Cellular-Resolution Brain-Machine Interface
    D. Muratore; E. J. Chichilnisky;
    Springer International Publishing, , pp. 443–465, 2020.

  13. Implications of Finite Clock Transition Time for LPTV Circuit Analysis
    S. Weinreich; D. Muratore; Y. Chae; T. McKay; B. Murmann;
    In IEEE International Symposium on Circuits and Systems (ISCAS),
    2020. DOI: 10.1109/ISCAS45731.2020.9180691
    document

  14. Sensory Particles with Optical Telemetry
    K. Ganesan; T.A. Flores; B.Q. Le; D.G. Muratore; N. Patel; S. Mitra; B. Murmann; D. Palanker;
    In IEEE International Symposium on Circuits and Systems (ISCAS),
    2020. DOI: 10.1109/ISCAS45731.2020.9180905
    document

  15. A Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording
    Dante Muratore; P. Tandon; M. Wootters; E.J. Chichilnisky; S. Mitra; B. Murmann;
    IEEE Transactions on Biomedical Circuits and Systems,
    pp. 1128 - 1140, August 2019. DOI: 10.1109/TBCAS.2019.2935468
    document

  16. Low-Noise Integrated Potentiostat for Affinity-Free Protein Detection With 12 nV/rt-Hz at 30 Hz and 1.8 pArms Resolution
    S. Fischer; D. Muratore; S. Weinreich; A. Peña-Perez; R.M. Walker; C. Gupta; R.T. Howe; B. Murmann;
    IEEE Solid-State Circuits Letters,
    Volume 2, Issue 6, pp. 41-44, June 2019. DOI: 10.1109/LSSC.2019.2926644
    document

  17. Sound Classification using Summary Statistics and N-Path Filtering
    D. Villamizar; D. Battaglino; D. G. Muratore; R. Hoshyar; B. Murmann;
    In IEEE International Symposium on Circuits and Systems (ISCAS),
    May 2019. DOI: 10.1109/ISCAS.2019.8702364
    document

  18. High-Resolution Time-Interleaved Eight-Channel ADC for Li-Ion Battery Stacks
    D.G. Muratore; E. Bonizzoni; S. Verri; F. Maloberti;
    IEEE Trans. Circuits Syst. Express Briefs,
    pp. 620-624, June 2017. DOI: 10.1109/TCSII.2016.2597358
    document

  19. A pipeline ADC for very high conversion rates
    D. G. Muratore; E. Bonizzoni; F. Maloberti;
    In IEEE International Symposium on Circuits and Systems (ISCAS),
    2016. DOI: 10.1109/ISCAS.2016.7527529
    document

  20. An 8-bit 0.7-GS/s single channel flash-SAR ADC in 65-nm CMOS technology
    D. G. Muratore; A. Akdikmen; E. Bonizzoni; F. Maloberti; U.-F. Chio; S.-W. Sin; R. P. Martins;
    In IEEE European Solid-State Circuits Conference (ESSCIRC),
    2016. DOI: 10.1109/ESSCIRC.2016.7598331
    document

  21. A capacitive sensor interface for high-resolution acquisitions in hostile environments
    D. G. Muratore; E. Bonizzoni; F. Maloberti; C. Fiocchi;
    In IEEE Latin American Symposium on Circuits Systems (LASCAS),
    2016. DOI: 10.1109/LASCAS.2016.7451036
    document

  22. A split transconductor high-speed SAR ADC
    D. G. Muratore; E. Bonizzoni; F. Maloberti;
    In IEEE International Symposium on Circuits and Systems (ISCAS),
    2015. DOI: 10.1109/ISCAS.2015.7169176
    document

  23. Very high-speed CMOS comparators for multi-GS/s A/D converters
    D. G. Muratore; A. Akdikmen; F. Maloberti;
    In IEEE Conference on Ph.D. Research in Microelectronics and Electronics (PRIME),
    2015.
    document

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