MSc thesis project proposal

Fault-tolerant decoding for implant processors

In the topic of next-generation, smart implantable medical systems (SiMS), a reliable decoder within the SiMS processor is targeted. A typical decoder may be quite costly in terms of energy and, as all aspects of the core rely on the correct setting of the decode stage, it has to be highly fault tolerant. As an alternative to conventional fault-tolerant methods (Triple modular redundancy, ECC, etc.), we would like to explore the use of artificial neural networks (ANNs). ANNs are a bio-inspired computing paradigm, where multiple (small) computing elements work together in problem solving by strengthening / weakening the links between them, much like how the human brain works. The advantage of such a paradigm, in terms of reliability, is that the network can potentially recover from a faulty computing element. Previous work on ANNs has shown that these may effectively be used for (fuzzy) ALU-design and memories. This project will explore the applicability of ANNs in a decode stage of a fault-tolerant processor aiming biomedical implants. The student is expected to evaluate several standard error-correcting codes and ANN schemes (pen and paper or implementation-driven) in terms of overheads (energy, area, etc.) and robustness (e.g. #nodes which may be removed). Subsequently, the student will implement a traditional decoder using an optimized solution on the SiMS processor.

Requirements

Project in cooperation with UMC Rotterdam.

Contact

dr.ir. René van Leuken

Signal Processing Systems Group

Department of Microelectronics

Last modified: 2017-12-13