[2020] Subthreshold Bit-Serial Microprocessor Design for On-Chip Low Energy BioSignal Processing

Serial computing is a digital computing paradigm in which the values in the system are represented by serialized streams of bits. In such a system, computations take place in a serialized fashion, where 1 bit of data is processed in each clock cycle. Therefore, for processing N-bit numbers, N clock cycles are required. One advantage of a serial processing system is the lower hardware and area requirements (roughly reduced by a factor of N).

Low energy operation is one of the most important metrics for the implantable neural recording microchips. As the energy supplied to such a chip through electromagnetic waves, ultrasound, energy harvesting or batteries is very limited, using the available energy in the most efficient way is of paramount importance.

Depending on the operating voltage and the data to be processed, serial computing may be more energy efficient. Furthermore, as the electrode arrays are getting bigger having more than 300 electrodes/channels, serial computing may help solve some of the area and capability related problems of neural recording chips. In this project, we would like to use subthreshold and possibly asynchronous operation of CMOS digital gates for implementing microprocessor specifically for processing biosignals (EEG, ECG, ECOG, etc.). As signal specific tuning methods such as sampling frequency or precision reduction may be employed in real-time, we aim to employ such techniques for improving the energy efficiency of such a microprocessor.

Assignment

The exact timeline of the project will be determined in close collaboration with the student. During this project, serial processing will be studied and a simple microprocessor with bit-serial architecture will be implemented. A compiler for the designed processor will be created. A previously developed high-level subthreshold energy model together with the digital design flow will be used for both the energy/performance evaluation and signal-specific optimization of the designed processor. Based on the evaluations and simulations, serial computing circuitry will be improved, developed and implemented in a standard CMOS technology, whose feature size will be decided during the course of the project. The system will be optimized in terms of energy dissipation and area based on the required number of electrode interfaces and signal processing capabilities.

Requirements

For this project, we are looking for a student with a strong digital design background with previous experience with low-level programming and possibly with compilers.

Experience with biosignals and a scripting language such as Python is a plus.

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Last modified: 2022-05-03